Chapter 11 of this book “Digital Data Locked Loops“ is being made available as a series of design articles. The first part is available here. I have spent more than 30 years toil.ing away as a digital ...

For more on Serial RapidIO, see The RapidIO High-Speed Interconnect: A Technical Overview, Easy multiprocessor design with sRIO and MSGQ, and Partitioning video across multiple DSPs and FPGAs. Today's ...

PCI-based bus systems can perform high-end image and signal processing with the VantageRT 7400 system from Mercury Computer Systems. It consists of the RACE++ high-speed multiprocessing Interlink ...